This invention relates generally to differential amplifiers and, more particularly, to an improved low noise, high precision differential input stage for an amplifier.
The implementation of a low noise, high precision input stage for a differential amplifier requires that the input DC bias current (i.e., the base current of the differential pair) be reduced. Reductions in input current and the accompanying input current noise level have been realized in some circuits by use of high beta or super beta transistors. These transistors reduce the effect of current shot noise (noise caused by the flow of discrete charges) by simply reducing DC base current due to the increase in transistor beta. This technique does not, however, address the problems associated with what is commonly referred to as 1/f current noise. This phenomenon is thought to be associated with impurities or recombination centers at the surface discontinuities of a transistor. The level of 1/f noise is inversely proportional to frequency and is a particularly significant problem at frequencies below approximately 1 Kilohertz. For frequencies in the sub-hertz region, this noise component can be very large.
Another problem with using high or super beta transistors is that such transistors have higher base spreading resistance, r.sub.b. This is a direct result of making the base shallower to increase beta. The increase in r.sub.b results in an increase in input voltage noise, V.sub.n, due to thermal effects.
Another approach to the reduction of input noise levels involves the use of input current cancellation circuits. An input bias current cancellation circuit is discussed in the article "Amplifier Techniques For Combining Low Noise, Precision, And High Speed Performance" published in the IEEE Journal of Solid State Circuits, Vol. SC-16, No. 6, pages 653-661 (December 1981). This circuit is shown in FIG. 1 and is described in detail below.
Another input bias current cancellation circuit is shown in U.S. Pat. No. 3,714,600 to Kuijk et al. This patent shows the use of measuring transistors T.sub.2 and T.sub.22 located in the respective collector legs of input transistors T.sub.1 and T.sub.11. The base of each measuring transistor is connected to the current input of a controlled current source, and each base of the input transistors is connected to the current output of the controlled source. A current proportional to the collector emitter current of the input transistor is supplied from the current source to the bases of the input transistors, thus reducing the current demand at the amplifier inputs. Transistors T.sub.2 and T.sub.22 are, however, located in the AC signal path of the amplifier and, due to their finite bandwidth and finite beta, degrade the AC performance of the circuit. These transistors also introduce noise to the AC signal path. As will be described in detail below, the circuit of the present invention includes a bias current cancellation arrangement which does not degrade overall amplifier performance in this manner.
An object of the present invention is to provide a differential amplifier circuit with reduced input current noise over a wide frequency range and, in particular, in the range of frequencies below 1 Kilohertz.
Another object of the present invention is to provide for the reduction of input currents to a differential amplifier while allowing only minimal increases in 1/f noise levels.
A further object of the present invention is to increase the common mode rejection ratio of a differential amplifier having an input current cancellation circuit without causing undesired increases in 1/f noise levels.
An even further object of the present invention is to provide a bias current cancellation circuit in the input stage of a differential amplifier which can be implemented with low surface noise transistors.
A still further object of the present invention is to provide a means for adjusting the bias currents for the low surface noise transistors to further reduce amplifier input current and noise.
These and other objects of the invention are attained in a differential amplifier stage which comprises a differential transistor pair, a biasing circuit, a sensing device connected serially between the commonly connected terminals of the differential pair and a reference potential, and a feedback device, interconnecting the sensing device and the amplifier inputs, for supplying current to the control terminals of the differential transistor pair. The feedback device may include a pair of current mirrors, each having a controlled leg connected to the sensing device and a controllable leg connected to the control terminals of one of the input transistors. The sensing device includes a transistor having first and second terminals serially connected between the common terminals of the differential pair the reference potential, and a control terminal connected to the feedback device. A preferred embodiment of the sensing device includes a second transistor having first, second and control terminals connected, respectively, to the first, second and control terminals of the first transistor. A level shifting diode connects the control terminals of the sensing device transistors to the feedback device.
In another embodiment of the circuit of the present invention, low surface noise transistors are used to implement the circuit. These transistors have a gate electrode which is connected to one of the transistor terminals. In a preferred embodiment, the gate electrodes of the input transistors and the sensing device transistors are connected to a resistance network to provide for adjusting the bias voltage applied to the gates. Adjustment of the resistors is preferably accomplished by a laser trimming technique.
Another feature of the circuit of the present invention is the use of a Darlington transistor pair in the collector legs of the input transistors. The Darlington pair minimizes the effect on the input transistors of variations in V.sub.CE, while also minimizing the introduction of noise into the circuit.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.